Twin well single mask CMOS process

Details Twin well single mask CMOS process Twin well single mask CMOS process

1984-11-07

1986-04-22

Roy, Upendra

Metal treatment

Compositions

Heat treating

29571, 29576B, 29578, 148187, 148DIG82, 357 42, 357 91, H01L 754, H01L 21265

Patent

active

045840270

ABSTRACT:
A twin-well process is formed using a single mask and lift-off techniques. The single implant mask is formed and the first well implanted followed by the deposition of a low temperature CVD film and the application of lift-off techniques to remove the mask and the overlying CVD film. The remaining portions of the CVD film provide a second mask which is self-aligned with and is the complement of the original mask. A second implantation then forms the second well. Alternative approaches using a photoresist mask and a composite nitride-photoresist mask structure are disclosed.

REFERENCES:
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patent: 4470191 (1984-09-01), Cottrell et al.
patent: 4509991 (1985-04-01), Taur
patent: 4516316 (1985-05-01), Haskell
Terman IBM-TDB, 23 (1984) 427.
Ogura et al., IBM-TDB, 27 (1984) 722.
Yachi et al., "A New Field Isolation Technology Employing Lift-Off Patterning of Sputtered SiO.sub.2 Films", IEEE Transactions on Electron Devices, vol. ED-31, No. 12, Dec. 1984, pp. 1748-1752.
Harper, "A Procedure for Field Implanting a CMOS Isoplanar Integrated Circuit", IEEE Transactions on Electron Devices, vol. ED-32, No. 3, Mar. 1985, pp. 720-722.

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