Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-07-01
2008-07-01
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185330, C257S324000
Reexamination Certificate
active
07394703
ABSTRACT:
The invention proposes am improved twin MONOS memory device and its fabrication. The ONO layer is self-aligned to the control gate horizontally. The vertical insulator between the control gate and the word gate does not include a nitride layer. This prevents the problem of electron trapping. The device can be fabricated to pull the electrons out through either the top or the bottom oxide layer of the ONO insulator. The device also incorporates a raised memory bit diffusion between the control gates to reduce bit resistance. The twin MONOS memory array can be embedded into a standard CMOS circuit by the process of the present invention.
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Ogura Seiki
Saito Tomoya
Satoh Kimihiro
Ackerman Stephen B.
Halo LSI, Inc.
Pham Ly D
Rosemary L. S. Pike
Saile Ackerman LLC
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