Static information storage and retrieval – Floating gate – Particular biasing
Patent
1989-11-29
1992-03-17
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular biasing
365184, 365218, G11C 1134, G11C 700
Patent
active
050974440
ABSTRACT:
The present invention provides protection against the effects of overerasure while essentially maintaining a single transistor per memory cell through the use of an additional transistor for each row of memory cells. The added transistor is a positive voltage threshold device which is coupled between the connected sources of the floating gate transistors and a read input line to limit the threshold voltage. For programming, a second transistor with a negative voltage threshold is coupled in the same manner, but is coupled to a program input line. The positive threshold transistor prevents an unselected transistor from turning on during a read operation.
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"A 5-V Only 256K-Bit CMOS Flash EEPROM" by D'Arrigo et al., 1989 IEEE Int'l Solid-State Circuits Conference.
Popek Joseph A.
Rohm Corporation
Whitfield Michael A.
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