Patent
1990-11-09
1992-03-03
Mintel, William
357 16, 357 63, 357 56, H01L 2988
Patent
active
050936921
ABSTRACT:
A tunnel diode is disclosed having a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on a semi-insulating substrate of indium phosphide. In an alternative embodiment, a tunnel diode is disclosed which has a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on an N-doped substrate.
REFERENCES:
patent: 3713909 (1973-01-01), Rosevear et al.
patent: 3746948 (1973-07-01), Marek
patent: 4371884 (1983-02-01), Esaki et al.
Article entitled "Design Principles and Construction of Planar Ge Esaki Diodes", by R. E. Davis and G. Gibbons, Solid State Electronics, 1967, vol. 10, pp. 461-472.
Article entitled "Tunnel Diodes by Vapor Growth of Ge on Ge and on GaAs", by J. C. Marinance, IBM Journal, Jul. 1960, pp. 280-282.
Figueredo Domingo A.
Kakihana Sanehiko
Su Chung-Yi
Menlo Industries, Inc.
Mintel William
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