Tuning system for a digital satellite receiver with fine tuning

Television – Receiver circuitry – Tuning

Patent

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4551832, 4551932, H04N 550

Patent

active

057398747

ABSTRACT:
An economical tuning system for a digital satellite television receiver includes a phase locked loop (PLL) tuning control IC of the which is normally used in a tuning system of a conventional terrestrial broadcast or cable television reciever to control the frequency of the local oscillator (LO). Unfortunately, the PLL IC is only capable of changing the frequency of the LO in relatively large steps. As a result, the operation of a carrier recovery loop which demodulates the digitally encoded IF signal produced by the tuner may be interrupted during a fine tuning mode because the carrier recovery loop may not be able to track frequency changes of the LO. To reduce such possibility, the integrator filter associated with the PLL IC is modified to decrease the rate of change of the LO frequency during the fine tuning mode.

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Preliminary Specification, "2.5 GHz bi-directional 12C-Bus Controlled Synthezizer TSA5055T", Phillips Semiconductors, pp. 3489, 3492-3497, Nov. 1991.
Data Sheet, "2.0 GHz PLL Frequency Synthesizers Include On-Board 64/65 Prescalers, MC145200, MC145201", Motorola Inc., pp. 1-20, 1993.

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