Tuning chart for devices under test

Details Tuning chart for devices under test Tuning chart for devices under test

2005-07-26

2005-07-26

Nghiem, Michael (Department: 2863)

Data processing: measuring, calibrating, or testing

Calibration or correction system

Circuit tuning

C345S440000, C345S440100

Reexamination Certificate

active

06922648

ABSTRACT:
An improved apparatus and method for tuning a device under test uses a spider diagram-like chart that provides the operator with visual cues as to the tuning status of a device under test (DUT). The spider diagram may be displayed on a graphical user interface (GUI), along with various adjustment points or potentiometers. The spider diagram includes a unit circle that represents the acceptable bounds for each measured parameter. Overlaying the unit circle is a polygon of three or more sides, with a vertex of each angle of the polygon representing a measured parameter. The polygon changes shape as the various potentiometers are adjusted. When a measured parameter value is at the center of its allowable range, the vertex of the angle corresponding to that measurement lies near the center of the unit circle. When a measured parameter is at its upper or lower bound, the vertex lies on the unit circle. When a measure parameter is less than its lower limit, or more than its upper limit, the vertex lies outside the unit circle.

REFERENCES:
patent: 5757357 (1998-05-01), Grande et al.
patent: 6590577 (2003-07-01), Yonts

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