Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2002-03-27
2004-09-07
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S752000, C257S758000, C257S915000, C438S629000, C438S637000, C438S700000
Reexamination Certificate
active
06787914
ABSTRACT:
BACKGROUND
The present invention relates to physical vapor deposition of titanium nitride.
Titanium nitride has been used as a barrier and adhesion layer in fabrication of tungsten plugs in semiconductor integrated circuits. Tungsten plugs interconnect different conductive layers separated by a dielectric. Frequently used dielectrics are silicon dioxide and silicon nitride. Tungsten does not adhere well to silicon dioxide and silicon nitride, so titanium nitride has been used to promote adhesion. In addition, titanium nitride serves as a barrier layer preventing a chemical reaction between WF
6 
(a compound from which the tungsten is deposited in a chemical vapor deposition process) and other materials present during tungsten deposition. See “Handbook of Semiconductor Manufacturing Technology” (2000), edited by Y. Nichi et al., pages 344-345.
FIGS. 1
, 
2
 illustrate a typical fabrication process. A dielectric layer 
110
 is deposited over a layer 
120
 which can be a metal or silicon layer. A via 
130
 is etched in the dielectric. A thin titanium layer 
140
 is deposited over dielectric 
110
 and into the via 
130
 to improve contact resistance (the titanium dissolves the native oxide on layer 
120
). Then titanium nitride layer 
150
 is deposited. Then tungsten 
160
 is deposited by chemical vapor deposition (CVD) from tungsten hexafluoride (WF
6
). Tungsten 
160
 fills the via. Layers 
160
, 
150
, 
140
 are removed from the top surface of dielectric 
110
 (by chemical mechanical polishing or some other process). See FIG. 
2
. The via remains filled, so the top surface of the structure is planar. Then a metal layer 
210
 is deposited. The layers 
160
, 
150
, 
140
 in via 
130
 provide an electrical contact between the layers 
210
 and 
120
.
Titanium nitride 
150
 can be deposited by a number of techniques, including sputtering and chemical vapor deposition (CVD). Sputtering is less complex and costly (see “Handbook of Semiconductor Manufacturing Technology”, cited above, page 411), but the titanium nitride layers deposited by sputtering have a more pronounced columnar grain structure. 
FIG. 3
 illustrates columnar monocrystalline grains 
150
G in titanium nitride layer 
150
. During deposition of tungsten 
160
, the WF
6 
molecules can diffuse between the TiN grains and react with titanium 
140
. This reaction produces titanium fluoride TiF
3
. TiF
3 
expands and causes failure of the TiN layer. The cracked TiN leads to a higher exposure of TiF
3 
to WF
6
, which in turn leads to the formation of volatile TiF
4
. TiF
4 
causes voids in the W film which are known as “volcanoes”. To avoid the volcanoes, the sputtered titanium nitride layers have been made as thick as 40 nm, and at any rate no thinner than 30 nm. In addition, the sputtered titanium nitride layers have been annealed in nitrogen atmosphere to increase the size of the TiN grains.
SUMMARY
The inventor has determined that under some conditions thinner annealed layers of sputtered titanium nitride unexpectedly provide better protection against the volcanoes than thicker layers. In some embodiments, fewer volcanoes have been observed with a TiN layer thickness of 20 nm than with 30 nm. In fact, no volcanoes have been observed in some structures formed with the 20 nm TiN layers. Why the thinner TiN layers provide better protection is not clear. Without limiting the invention to any particular theory, it is suggested that perhaps one reason is a lower stress in the thinner annealed layers and a higher density of the TiN grains.
The invention is applicable to physical vapor deposition techniques other than sputtering. Additional features and embodiments of the invention are described below.
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Handbook of Semiconductor Manufacturing Technology:, (2000), edited by Y. Nichi et al., pp. 344-345.
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S. Wolf, “Silicon Processing for the VLSI Era”, vol. 2, (1990), p. 246.
Meetin Ronald J.
Mosel Vitelic Inc.
Tran Long
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