Tunable logarithmic amplifier circuit using cascaded triple-tail

Details Tunable logarithmic amplifier circuit using cascaded triple-tail Tunable logarithmic amplifier circuit using cascaded triple-tail

1996-04-08

1997-05-20

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

Logarithmic

327352, G06F 7556, G06G 724

Patent

active

056315945

ABSTRACT:
A logarithmic amplifier circuit including a first triple-tail cell for rectifying an initial input signal to produce a first rectified output signal and a first amplified output signal, a second triple-tail cell for rectifying the first amplified output signal of the first triple-tail cell to produce a second rectified output signal and a second amplified output signal; and an adder for adding the first rectified output signal and the second rectified output signal. Each of the first and second triple-tail cells has first, second and third transistors whose emitters or sources are coupled together, said first and second transistors forming a differential pair. The differential pair and third transistor are driven by a single tail current. A base or gate of the third transistor are applied with ad c tuning voltage. Reduction of the circuit scale and total current consumption, low-voltage operation, and the logarithmic characteristics tuning can be realized.

REFERENCES:
patent: 5057717 (1991-10-01), Kimura
patent: 5467046 (1995-11-01), Kimura
patent: 5471166 (1995-11-01), Kimura
patent: 5489868 (1996-02-01), Gilbert
patent: 5521542 (1996-05-01), Kimura
K. Kimura, "Some Circuit Design Techniques for Bipolar and MOS Pseudologarithmic . . . Voltage," IEEE Trans on Cir and Sys --I: Fund Theory and Applns, vol. 39, No. 9, Sep. 1992, pp. 771-777.

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