Tunable alignment geometry

Details Tunable alignment geometry Tunable alignment geometry

2006-09-26

2006-09-26

Nguyen, Tuan H. (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

C438S401000

Reexamination Certificate

active

07112890

ABSTRACT:
An alignment targets with geometry designs provides an desired alignment offset for processes (both symmetric and asymmetric) on a wafer substrate. The alignment target includes one or more sub-targets, where each sub-target is defined as having a left portion and a right portion having a different geometric pattern, and where the left portion has a geometry density and the right portion has a geometry density.

REFERENCES:
patent: 6465322 (2002-10-01), Ziger et al.
patent: 2001/0051441 (2001-12-01), Ziger et al.
patent: 2003/0227625 (2003-12-01), Heisley et al.
patent: 2004/0099963 (2004-05-01), Holloway et al.

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