TTL tristate circuit for output pulldown transistor

Details TTL tristate circuit for output pulldown transistor TTL tristate circuit for output pulldown transistor

1990-06-16

1991-09-24

Miller, S. D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307454, 307456, 3072964, 307263, H03K 1902, H03K 19088

Patent

active

050516230

ABSTRACT:
The lower output pulldown tristate circuit for a TTL tristate output buffer circuit includes the enable signal invertor buffer having an OE signal input and an OE signal output providing output enable OE signals, and a Miller killer transistor element having collector and emitter nodes coupled between the base node of the TTL tristate output pulldown transistor and the low potential power rail. The base node of an emitter follower transistor element is coupled to the OE signal input and the emitter node provides a DC Miller killer DCMK signal output in phase with the OE signal input. A voltage divider couples the DCMK signal output to the base node of the Miller killer transistor element for discharging the base of the output pulldown transistor in response ot a high potential DCMK signal during the high impedance tristate at the output. The DC Miller killer circuit is applied in a high speed TTL tristate output and multi-bit line driver. The emitter follower DCMK signal output and voltage divider coupling reduce DCMK signal generation delay, eliminate current hogging between Miller killer transistor elements of the multiple output buffers of a multi-bit output, and dispense with the ballast resistors which introduce delay.

REFERENCES:
patent: 4398103 (1983-08-01), Derzawiec et al.
patent: 4481430 (1984-11-01), Houk et al.
patent: 4581550 (1986-04-01), Ferris et al.
patent: 4649297 (1987-03-01), Vazehgoo
patent: 4661727 (1987-03-01), Ferris et al.
patent: 4667320 (1987-06-01), Hannington
IBM Tech. Disc. Bul., "Tri-State Read/Write Control Circuit" Marcella et al., vol. 24, No. 1B 6/81.

Affiliated with

Also associated with

Rating

TTL tristate circuit for output pulldown transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with TTL tristate circuit for output pulldown transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and TTL tristate circuit for output pulldown transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1698795