TTL to MOS converter with power supply noise rejection

Details TTL to MOS converter with power supply noise rejection TTL to MOS converter with power supply noise rejection

1987-01-08

1988-11-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 307469, 307451, H03K 1716, H03K 1903, H03K 19092

Patent

active

047836032

ABSTRACT:
An input buffer for coupling TTL logic circuits to CMOS logic circuits, the buffer being used to convert between standard TTL logic signals and CMOS logic signals. The buffer includes a first inverter circuit and a second inverter circuit coupled in a cascade (output of first inverter coupled to the input of the second inverter). The first inverter includes two resistors (Rcc and Rss); the Rcc resistor couples the first inverter to a first reference voltage, which is usually a power supply voltage rail, and Rss couples the first inverter to a second reference voltage. The first inverter also includes a capacitor coupled in parallel with that inverter. Power supply noise is isolated from the first inverter so that the buffer has better immunity from noise than the prior art.

REFERENCES:
patent: 4305009 (1981-12-01), Miyagawa et al.
patent: 4547742 (1985-10-01), Maschek
patent: 4609836 (1986-09-01), Koike

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