TTL to ECL voltage level translator

Details TTL to ECL voltage level translator TTL to ECL voltage level translator

1988-07-05

1991-06-18

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307456, H03K 19092, H03K 19086

Patent

active

050251805

ABSTRACT:
The present invention relates to a level translator which translates TTL level signals to ECL level. The translating speed is enhanced by making the input circuit of the level translator which receives the TTL data signal composed of an emitter coupled pair such that the circuit does not act in saturation mode. Also, by designing the circuit to make current flow from the pull-up transistor of the TTL transfer through the resistance of the present invention when the TTL data is high level, and to make current flow through the pull-down transistor of the driving TTL circuit into the TTL to ECL level translator when low level, the present invention makes the time delay from the driving TTL circuit to the ECL receiving circuit very small.

REFERENCES:
patent: 4518876 (1985-05-01), Constantinescu
patent: 4607177 (1986-08-01), Lechner
patent: 4654549 (1987-03-01), Hannington
patent: 4698527 (1987-10-01), Matsumoto
patent: 4700087 (1987-10-01), Stroberger
patent: 4806800 (1989-02-01), Khan
"Analysis and Design of Digital Integrated Circuits", by David A. Hodges et al., McGraw-Hill, 1983, pp. 293-295.

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