TTL to ECL input buffer

Details TTL to ECL input buffer TTL to ECL input buffer

1988-03-24

1990-07-24

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 3072966, 3072967, H03K 19092, H03K 1902, H03K 301

Patent

active

049437437

ABSTRACT:
An input buffer for translating TTL level signals to ECL level signals has a level shifter having a first and a second inupt transistor. The first input transistor receives the input signal and the second transistor receives a reference voltage. First and second transistor loads are coupled to the first and second transistors, respectively. Both the first and second loads are biased to the same saturation current. The saturation current is derived from a current source. The reference voltage is set at a voltage which is between the maximum voltage of a logic low of the input signal and the minimum voltage of a high of the input signal. The deferential level shifter develops a voltage differential which is converted to ECL level signals by a differential amplifier.

REFERENCES:
patent: 4678940 (1987-07-01), Vasseghi et al.

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