Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1989-08-23
1990-07-31
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307455, 307494, 307362, H03K 19092
Patent
active
049452630
ABSTRACT:
A TTL to ECL/CML translator circuit delivers differential or complementary ECL logic output signals in response to TTL input signals with voltage gain, small output voltage swing and with a narrow transition region. The TTL input circuit is coupled to a current mirror circuit with first and second current mirror branch circuits. A differential amplifier gate circuit with differential amplifier first and second gate transistor elements co-acts with the current mirror circuit. The second current mirror branch circuit also constitutes the differential amplifier first gate transistor element. A threshold clamp circuit applies a threshold voltage level at the base node of the differential amplifier second gate transistor element thereby establishing a TTL input threshold at the threshold voltage level. First and second ECL output circuits are coupled to the collector nodes of the differential amplifier first and second gate transistor elements for delivering complementary ECL output signals. The biasing components or elements of the TTL input circuit and threshold clamp circuit are selected for example for an output voltage swing of 1V.sub.BE, a threshold voltage level of 2V.sub.BE, and so that the voltage level at a common emitter node coupling of the current mirror circuit and differential amplifier gate circuit rises to turn off the second gate transistor element when the current mirror is conducting.
REFERENCES:
patent: 4553842 (1985-08-01), Yang et al.
patent: 4607177 (1986-08-01), Lechner
patent: 4654549 (1987-03-01), Hannington
patent: 4684831 (1987-08-01), Kruest
patent: 4698527 (1987-10-01), Matsumoto
patent: 4736125 (1988-04-01), Yuen
patent: 4771191 (1988-09-01), Estrada
patent: 4806800 (1989-02-01), Khan
patent: 4857776 (1989-08-01), Khan
patent: 4883990 (1989-11-01), Umeki
Gaudenzi et al., "Level Converter Circuit", IBM TDB, vol. 19, No. 2, Jul. 1976, p. 498.
Parker, "Converter Circuit", IBM TDB, vol. 17, No. 6, Nov. 1974, p. 1618.
Hudspeth David
Kane Daniel H.
National Semiconductor Corporation
Patch Lee
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