Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1989-08-17
1991-05-07
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307310, 307455, 307544, 307443, H03K 1908
Patent
active
050139410
ABSTRACT:
A translator-translator logic (TTL) to emitter coupled logic or current mode logic (ECL/CML) input buffer and translator circuit provides temperature compensated input and threshold signal voltage levels to a translator circuit ECL gate for improved operation of the translator circuit. A threshold clamp circuit is coupled between an on-chip band-gap bias generator and the base node of the reference transistor element of the translator circuit ECL gate. The threshold clamp circuit maintains a substantially fixed temperature compensated reference voltage or threshold voltage level at the base node of the reference transistor element, referenced to the temperature compensated current source voltage level V.sub.cs from the bias generator. An input clamp circuit also references the logic high signal voltage level V.sub.TH at the base node of the ECL gate input transistor element to V.sub.CS.
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Kane Daniel
Miller Stanley D.
National Semiconductor Corporation
Ouellette Scott A.
Patch Lee
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