TTL to CMOS translating input buffer circuit with dual threshold

Details TTL to CMOS translating input buffer circuit with dual threshold TTL to CMOS translating input buffer circuit with dual threshold

1992-02-18

1993-10-26

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 307360, H03K 1920, H03K 190175

Patent

active

052569160

ABSTRACT:
A TTL to CMOS translating input buffer circuit receives TTL input data signals at an input (V.sub.IN) and delivers CMOS data signals at an output (V.sub.OUT). The input buffer circuit is provided with an expanded first stage with expanded pullup circuit (P1) and pulldown circuit (N1) having control gate nodes coupled to the input (V.sub.IN). The pullup and pulldown circuits (P1,N1) are constructed to provide dual switching thresholds at the input (V.sub.IN). A first stage output pullup and pulldown circuit (P1R,P1L,N1L) switches at a relatively lower first threshold voltage level. A pullup enhancer circuit (P1E,I3,I4) switches at a relatively higher second threshold voltage level. The pullup and pulldown circuits (P1,N1) of the expanded first stage are constructed for switching dynamic current at an output node (m1) at the relatively lower first threshold voltage level for data signal transitions between high and low potential levels at the output node (m1). The pullup enhancer circuit (P1E,I3,I4) switches static current (I.sub.CCT) through the output node (m1) at the relatively higher second threshold voltage level to reduce static current (I.sub.CCT) during a static low potential level data signal (L) at the output node (m1). The expanded pullup circuit (P1) incorporates a static current restricting first pullup transistor (P1R), a dynamic current enhancing second pullup transistor (P1E) coupled in parallel with the first pullup transistor (P1R), and at least one pullup current summing third pullup transistor (P1L,P1LA,P1LB) coupled to the output node (m1).

REFERENCES:
patent: 4961010 (1990-10-01), Davis
patent: 4999529 (1991-03-01), Mogran, Jr. et al.
patent: 5051624 (1991-09-01), Park
patent: 5065224 (1991-03-01), Fraser et al.
patent: 5087841 (1992-02-01), Rogers
patent: 5089722 (1992-02-01), Ameded
patent: 5122690 (1992-06-01), Bianchi

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