TTL to CMOS Interface circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307451, 307579, 307585, H03K 19092, H03K 19094, H03K 1920, H03K 1704

Patent

active

043807100

ABSTRACT:
An interface circuit including a FET inverter with its N channel device being part of the controlled leg of a first current mirror and its P channel device being part of the controlled leg of a second current mirror. The operating point of the inverter is the reference signal applied on the input to the current mirrors. The controlled leg of the first current mirror includes a variable current source responsive to the input signal and the controlled leg of the second current mirror includes a variable current sink for improving the response time of the inverter and compensates the inverter for manufacturing tolerances.

REFERENCES:
patent: 3676700 (1972-07-01), Buchanan
patent: 4258272 (1981-03-01), Huang
patent: 4295065 (1981-10-01), Hsieh et al.
patent: 4342928 (1982-08-01), Gschwendtner et al.

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