TTL to CMOS buffer circuit

Details TTL to CMOS buffer circuit TTL to CMOS buffer circuit

1989-07-21

1991-05-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307451, 307481, 323315, H03K 19092, H03K 19096, H03K 19003, H03K 1716

Patent

active

050197290

ABSTRACT:
A buffer circuit includes first and second differential amplification type buffer circuits. The input nodes of the first and second differential amplification type buffer circuits are connected together and the output nodes of the first and second differential amplification type buffer circuits are also connected to each other. The first differential amplification type buffer circuit is constituted by a pair of driving P-channel MOS transistors and N-channel MOS transistors acting as loads of the P-channel MOS transistors and connected to constitute a current mirror circuit. The second differential amplification type buffer circuit is constituted by P-channel MOS transistors acting as loads and connected to constitute a current mirror circuit and a pair of driving N-channel MOS transistors.

REFERENCES:
patent: 4264874 (1981-04-01), Young
patent: 4275316 (1981-06-01), Knapp
patent: 4380710 (1983-04-01), Cohen et al.
patent: 4471242 (1984-09-01), Noufer et al.
patent: 4618785 (1986-10-01), van Tran
patent: 4717845 (1988-01-01), Dunn
patent: 4767942 (1988-08-01), Minami et al.
patent: 4800303 (1989-01-01), Graham et al.

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