TTL output stage having auxiliary drive to pull-down transistor

Details TTL output stage having auxiliary drive to pull-down transistor TTL output stage having auxiliary drive to pull-down transistor

Filed on

1983-03-16

Date issued

1990-03-27

Examiner

Hudspeth, David

Patent Class

Electrical transmission or interconnection systems

SubClass

Nonlinear reactor systems

SubSubClass

Parametrons

Other Related Categories

307443, 307270, H03K 19013

Type

Patent

Status

active

Patent number

049123440

Description

ABSTRACT:
A novel output stage is provided for producing a TTL output signal in response to the differential output signals from an ECL switch. The output stage includes a translator portion to shift the levels of the complementary signals produced by the ECL switch to the appropriate levels for use in driving a TTL output stage, a phase splitter circuit which is driven by the level shifted complementary output signals from the ECL stage and a single output lead. The currents through the level shifting transistors and resistors are controlled by a single current reference generator. The output signals from the translator circuit have voltage levels substantially independent of variations in the power supply voltage.

REFERENCES:
patent: 4237388 (1980-12-01), Nokubo et al.
patent: 4280065 (1981-07-01), Minato et al.
patent: 4311927 (1982-01-01), Ferris
patent: 4631422 (1986-12-01), Piasecki
"Totem Pole Driver for High-Capacitance Loads," E. Colao et al., IBM Tech. Disclosure Bulletin, vol. 18, No. 11, Apr. 1976, pp. 3649-3650.
"Bit-Slice Parts Approach ECL Speeds with TTL Power Levels", D. Mrazek, Electronics International, vol 51, No. 23, Nov. 1978, pp. 107-112.
"A Masterslice LSI For Subnanosecond Random Logic", W. Braeckelmann et al., IEEE Journal of Solid State Circuits, vol. 14, No. 5, Oct. 1978, pp. 829-832.

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