TTL-ECL level converter operable with small time delay by contro

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307455, 307362, 307549, 307551, 307300, H03K 19013, H03K 19086, H03K 19092

Patent

active

046985271

ABSTRACT:
A TTL-ECL signal level converter includes: an input terminal receiving an input TTL signal; an input diode having a cathode connected to the input terminal; an input transistor having a collector connected to a positive power source, a base connected to an anode of the input diode and grounded through a first series connection of diodes and an emmiter connected to a negative power source through a second series connection of diodes and a current source; a reference voltage source; a clamping transistor having a collector grounded, a base receiving the reference voltage and an emitter connected to a connection point of the second series connection and the current source; and a comparing means for comparing a voltage at the connection point of the second series connection and the current source with the reference voltage, the comparing means producing an output ECL signal as a result of the comparison.

REFERENCES:
patent: 4356409 (1982-10-01), Masuda et al.
patent: 4437021 (1984-03-01), Sumi et al.
patent: 4518876 (1985-05-01), Constantinescu
patent: 4527079 (1985-07-01), Thompson
patent: 4607177 (1986-08-01), Lechner
patent: 4612460 (1986-09-01), Gloaguen et al.
patent: 4620115 (1986-10-01), Lee et al.
patent: 4654549 (1987-03-01), Hannington
Gersbach, "TTL Emitter-Coupled Logic Converter", IBM T.D.B., vol. 19, No. 1, Jun. 1976, p. 22 (307/475).
Bond, "TTL-To-ECL Logic Level Converter", IBM T.D.B., vol. 20, No. 10, Mar. 1978, p. 3976 (307/475).

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