Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1990-02-23
1991-07-23
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307300, H03K 19013, H03K 19088
Patent
active
050346318
ABSTRACT:
An output circuit compatible with TTL-type circuits, manufactured without Schottky devices comprises an intermediate stage (11) and an output stage (12). In the output stage, a first transistor (Q1) has its collector (C1) connected to the terminal (13) of the supply source through a resistor (R1) and its emitter (E1) connected to the output (S) through a diode (D1). A second transistor (Q2) has its collector (C2) connected to the output terminal (S) and its emitter (E2) connected to the terminal (14) of the supply source. A third transistor (Q3) has its emitter (E3) connected to the base (E2) of the second transistor (Q2) through a resistor (R4), its collector (C3) connected to the terminal (13) of the supply source and its base (B3) connected to the input terminal (A1). The intermediate stage is constituted by an inverter which controls the first transistor (Q1) in phase opposition with respect to the second transistor (Q2 ).
REFERENCES:
patent: 4339676 (1982-07-01), Ramsey
patent: 4562364 (1985-12-01), Tamizawa
patent: 4661727 (1987-04-01), Ferris et al.
patent: 4912344 (1990-03-01), Yin
patent: 4958090 (1990-09-01), Jansson
Varadarajan, "Antisaturation TTL Circuit", IBM T.D.B., vol. 14, No. 1, Jun. 1971, p. 335.
Wiedmann, "A Novel Saturation Control in TTL Circuits", IEEE J.S.S.C., vol. SC-7, No. 3, 6-1972, pp. 243-250.
Hudspeth David
SGS-Thomson Microelectronics S.A.
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