TTL compatible input buffer

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307576, 307585, 307362, 307594, 307355, 3072471, 323316, 323317, 330257, H03K 19092, H03K 17687, H03K 5153, H03K 524

Patent

active

046773215

ABSTRACT:
An input buffer circuit, especially well-suited for use as a TTL-TO-CMOS interface circuit, has a differential transistor pair at the input for stabilizing the circuit switching point relative to logic level voltage transitions occurring at the input. A preferred embodiment of the circuit has a first switching device in the input stage for decreasing the circuit response time to a first (e.g., high-to-low) logic level transition, and a second switching device for decreasing the response time to a second (e.g., low-to-high) logic level transition. Output buffers, in the form of inverters, may also be provided.

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