TTL compatible CMOS input buffer

Details TTL compatible CMOS input buffer TTL compatible CMOS input buffer

1985-04-29

1988-01-05

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307451, 307469, 307570, H03K 1902, H03K 19094, H03K 1760

Patent

active

047178477

ABSTRACT:
A TTL to CMOS buffer includes first and second field effect transistors of opposite conductivity types connected to form an inverter. The main current conducting path of a third transistor is connected in series with the current conducting paths of the first and second transistors. The control terminal of the third transistor is connected to a power supply. In a preferred embodiment, a bipolar transistor is connected between the output of the inverter circuit and the buffer output. The bipolar transistor may be a common parasitic device produced in conjunction with the CMOS circuits. This transistor offers a degree of temperature compensation to the buffer circuit output.

REFERENCES:
patent: 3601630 (1971-08-01), Redwine
patent: 3900746 (1975-08-01), Kraft et al.
patent: 4185209 (1980-01-01), Street
patent: 4274014 (1981-06-01), Schade, Jr.
patent: 4295065 (1981-10-01), Hsieh et al.
patent: 4301383 (1981-11-01), Taylor
patent: 4449065 (1984-05-01), Davis, Jr.

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