Tristatable driver for internal data bus lines

Details Tristatable driver for internal data bus lines Tristatable driver for internal data bus lines

1996-12-31

1998-05-05

Zarabian, A.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36518911, 365208, G11C 800

Patent

active

057485569

ABSTRACT:
An integrated circuit, such as a memory, having an internal data bus for communicating the output of a sense amplifier, is disclosed. The sense amplifiers are of the differential type, having first and second sense nodes at which the amplified differential signal appears. When unselected, or during precharge, each sense amplifier is precharged so that its sense nodes are at a power supply voltage, for example V.sub.cc. Each sense amplifier is connected to a data driver of the push-pull type, in such a manner that both the pull-up and pull-down transistors are off in the precharged or unselected state. This ability to tristate the data driver from the precharged state of the sense amplifier allows for the high impedance state to be entered without requiring an additional signal to be communicated thereto. Such operations as precharging the data bus conductors are thus facilitated, providing improved access time performance.

REFERENCES:
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patent: 5068831 (1991-11-01), Hoshi
Kayano, et al, 25-ns 256K X1/64KX4 CROS SRAM's, IEEE Journal of Solid-State Circuits, vol. SC-21, No. 5, Oct. 1986, pp. 686-691.

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