Triple port cache memory

Details Triple port cache memory Triple port cache memory

1993-06-11

1995-08-15

Rudolph, Rebecca L.

Static information storage and retrieval

Magnetic bubbles

Guide structure

36523003, 36523005, 364DIG1, 3642436, 364247, 364243, 364251, 3642513, 395444, G06F 1200

Patent

active

054427703

ABSTRACT:
Cache memory input/output apparatus that allows transfer of a single data word and transfer of consecutive sequences of data words in a row of memory, using two independent serial ports and a random access port whose actions are controlled in part by a memory address signal. Data transferred by the serial ports are double buffered, each serial port having two independent registers; and the two registers associated with a serial port may be ganged together to transfer data sequences having word lengths from 16, or multiples thereof, up to arbitrary multiples of the length of a row of data words.

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