Amplifiers – With semiconductor amplifying device – Including plural stages cascaded
Reexamination Certificate
2007-10-02
2007-10-02
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural stages cascaded
C330S310000
Reexamination Certificate
active
11267243
ABSTRACT:
Provided is a power amplifier which fits to a deep-submicron technology in radio frequency wireless communication. The power amplifier includes a cascode including a first transistor which receives and amplifies an input signal, and a second transistor which is connected to the first transistor in series and operated by a DC bias voltage; a third transistor which is connected between the cascode and an output end, operated by a dynamic gate bias and outputting a signal; and a voltage divider which includes first and second capacitors that are connected between the output end, i.e. a drain of the third transistor, and a ground in series, and provides the dynamic bias to a gate of the third transistor.
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Kim Cheon-Soo
Oh Hyoung-Seok
Park Mun-Yang
Yu Hyun-Kyu
Choe Henry
Electronics and Telecommunications Research Institute
Ladas & Parry LLP
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