Trimming pattern

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – Plural non-isolated transistor structures in same structure

Reexamination Certificate

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Details

C257S530000, C257S533000, C257S529000, C257S360000, C257S568000, C257S567000, C257S570000

Reexamination Certificate

active

06969904

ABSTRACT:
There is provided a trimming pattern enabling trimming to be implemented with ease and time required for trimming to be shortened without causing damage to internal elements. The invention provides the trimming pattern for use in trimming of a semiconductor integrated circuit, comprising two pads to which a voltage is applied, a thin line part interconnecting the two pads, and two connecting parts disposed away from each side of the thin line part, and connected to an adjustment circuit and the semiconductor integrated circuit, respectively. With the invention, trimming is executed by a method of turning the adjustment circuit connected to the connecting parts into the ON state by connecting fused metal of the thin line part to the connecting parts. In this case, since the fused metal can be caused to come into contact with the connecting parts nearby with greater ease than fusion cutting of the thin line part, trimming can be implemented with ease and in shorter time.

REFERENCES:
patent: 6674316 (2004-01-01), Romas et al.
patent: 05021604 (1993-01-01), None
patent: 2001230325 (2001-08-01), None

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