Triggering of an ESD NMOS through the use of an N-type...

Details Triggering of an ESD NMOS through the use of an N-type... Triggering of an ESD NMOS through the use of an N-type...

2005-02-15

2005-02-15

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Device protection

C257S355000, C257S356000, C257S360000

Reexamination Certificate

active

06855964

ABSTRACT:
An ESD NMOS structure with an odd number of N-type structures built into a P-type well. Buried N-type structures are positioned between the N-type structures. The center N-type structure and each alternate N-type structure are electrically connected to each other, to the buried N-type structures, and to the output contact; while the other N-type structures are electrically connected to each other and the P-well and to ground. When a positive ESD event occurs, a depletion zone is created in the P-well between the N-type buried structures and the N-type structures thereby increasing the resistivity of the structure. Moreover, when a positive ESD event occurs, the lateral NPN transistors on either side of the center N-type structure break down and snap back. The resulting current travels through the area of increased resistivity and thereby creates a larger voltage along the P-well from the center N-type structure out toward the distal N-type structures. The combination of the increased resistivity and the higher voltage act in combination to lower the triggering voltage of the ESD structure.

REFERENCES:
patent: 5019888 (1991-05-01), Scott et al.
patent: 5870268 (1999-02-01), Lin et al.
patent: 5932914 (1999-08-01), Horiguchi
patent: 6063672 (2000-05-01), Miller et al.
patent: 20010053054 (2001-12-01), Andoh
Notification of Transmittal of the International Search Report, dated Apr. 1, 2003.

Affiliated with

Also associated with

Rating

Triggering of an ESD NMOS through the use of an N-type... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Triggering of an ESD NMOS through the use of an N-type..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Triggering of an ESD NMOS through the use of an N-type... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3453711