Triggered frequency locked oscillator having programmable delay

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 25, 331 34, 331135, 331173, 331175, 331DIG3, H03K 303, H03L 700

Patent

active

046460306

ABSTRACT:
An oscillator produces an output signal which is frequency locked to a reference signal but phased locked to a triggering signal. The oscillator includes a NOR gate having its output fed back to one of its inputs through a programmable delay circuit while the triggering signal is applied to another of its inputs. When enabled by the triggering signal, the output signal of the NOR gate oscillates at a frequency inversely proportional to the delay time of the delay circuit. The delay time is controlled by a control circuit which counts NOR gate output signal cycles occurring during a predetermined number of reference signal cycles and increments the delay time when the count is higher than expected for an oscillator output signal of a desired frequency and decrements the delay time when the count is lower than expected.

REFERENCES:
patent: 3562558 (1971-02-01), Totten
patent: 4103251 (1978-07-01), Glick

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