Triggered data generator

Coded data generation or conversion – Digital code to digital code converters – Serial to parallel

Reexamination Certificate

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C341S101000

Reexamination Certificate

active

11359010

ABSTRACT:
A triggered data generator reduces timing jitter at the start of serial data output from arrival of a trigger signal. A trigger detecting circuit8produces trigger phase information indicating the phase relationship between the trigger signal and a reference clock. A data pattern generating circuit10generates parallel data bits according to the reference clock in response to the trigger signal. A data shifting circuit11rearranges the parallel data bits in a predetermined order to produce shifted parallel data bits in which data bit order is shifted relative to the reference clock as a function of the trigger phase information. A parallel to serial converter16converts the shifted parallel data bits into serial data bits.

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Compugen 1100, IBM PC Based High-speed Arbitrary Waveform Generator Card, 4 pages.
Lecroy PXA 125 Arbitrary Waveform Generator, Aug. 2002, 2 pages.
Tabor Electronics Ltd., 125MS/s PCIBus Arbitrary Waveform Generator, Model TE5300, 6 pages.

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