Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2007-05-08
2007-05-08
Potter, Roy Karl (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S678000
Reexamination Certificate
active
11329887
ABSTRACT:
A method performed on a wafer having multiple chips, each including a doped semiconductor and substrate, involves etching an annulus trench partially into the substrate, metalizing an inner and outer perimeter side wall of the annulus trench with a metal, etching a via trench within the periphery of the annulus trench, making a length of the via trench electrically conductive, and thinning the substrate to expose the metal and the electrically conductive material so that the metal on the outer perimeter side wall and on the inner perimeter side wall are both electrically separated from each other and from the electrically conductive material.
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Cubic Wafer Inc.
Morgan & Finnegan , LLP
Potter Roy Karl
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