Patent
1987-03-18
1989-03-14
Clawson, Jr., Joseph E.
357 20, 357 86, H01L 29747
Patent
active
048128937
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to triacs.
Triacs are semiconductor components having two main electrodes and a control electrode (gate), this latter allowing the triac to be enabled so that current can pass between the main electrodes.
2. Description of the Prior Art
When the triac has been enabled by an appropriate pulse on its gate, it remains conducting until a zero cross over of the current which flows between its main electrodes, then it is disabled and should theoretically only be enabled again when a new pulse arrives on its gate.
The zero cross overs of the current between the main electrodes are imposed by the circuit external to the triac. In particular, triacs are used in circuits fed with alternating power, so as to control loads which may be either completely resistive or more or less inductive or capacitive. The control of more or less inductive loads is very frequent since it is met with particularly in the control of motors.
When the load is inducted, there is a phase delay between the current which flows through the load and the supply voltage at the terminals of this load. The result is that at the time of zero cross over of the current in the triac, the voltage at the terminals of the load is non zero (whereas it would be so with a purely resistive load).
Not only is this voltage not zero but it may be an appreciable fraction of the supply voltage.
Now, when the triac is disabled under the effect of cancellation of the current which flows through it, it acquires a very high impedance which means that substantially the whole of the supply voltage is to be found abruptly at the terminals of the triac and no longer at the terminals of the load.
There is then, at the time of disabling of the triac, a very rapid growth of the voltage at the terminals of the triac, which voltage passes in a very short time from 0 to a considerable fraction of the supply voltage. It is known that this very rapid growth may cause the triac to strike, that is to say untimely re-enabling (which will last until the next cancelling of the current in the load). This striking, called dV/dt striking is quite undesirable since the triac should only be re-enabled by gate pulses at well controlled times.
This phenomenon is all the more troublesome that dV/dt re-striking after a conduction phase seems to occur for a value of dV/dt (time growth gradient of the voltage) appreciably lower than the value which the triac would withstand if an attempt were made to cause dV/dt striking thereof without a previous conduction phase. In the presence of a previous conduction phase, the resistance of the components to such undesirable re-striking is called "dV/dt resistance to switching on opening";
It is therefore desirable to construct triacs which are insensitive to re-enabling by dV/dt striking on switching.
However, it is desirable for these triacs to be sensitive to a control provided by a low gate current.
These two requirements result in contradictory design constraints, all the more so since in general it is desirable to obtain triacs which are sufficiently sensitive whatever the polarities of the voltages at the terminals of the different electrodes of the triac.
It is recalled in this connection that the triggering of a triac is achieved in four distinct modes which are the following, in which a main electrode A1 is taken as potential reference, and the potential V2 of the other main electrode A2 and the potential Vg of the gate G are examined: the second quadrant:
Obtaining sufficient sensitivity for gate triggering in these four quadrants results in particular configurations of the different doped zones and metal electrodes which form the internal structure of the triac.
Prior Art FIGS. 1 to 3 shows a normal triac configuration with so called central gate.
To explain this structure, a cross section of the structure has been shown first of all in FIG. 1 then in FIG. 2 a top view showing the cutting up of the doped zones (spotted zones of type N or non spotted zones of type P, su
REFERENCES:
patent: 3711325 (1973-01-01), Hentzschel
patent: 3879744 (1975-04-01), Dumas
patent: 3964091 (1976-06-01), Bernoes et al.
patent: 4611128 (1986-09-01), Patalong
Clawson Jr. Joseph E.
SGS-Thomson Microelectronics S.A.
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