Tri-state logic level converter circuit

Details Tri-state logic level converter circuit Tri-state logic level converter circuit

1989-02-14

1989-09-05

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307455, 307473, 307264, H03K 1716, H03K 19086, H03K 19092

Patent

active

048641669

ABSTRACT:
A logic level converter circuit has a first state (E.sub.1 low, E.sub.2 low) which produces a high level on the output TTL S, a second state (E.sub.1 high, E.sub.2 low) which produces a low level on the output S, and a third state (E.sub.2 high) which a very high impedance in which the two output transistors T.sub.5 and T.sub.6 are turned off. The current of a current source I.sub.1 is directed by the transistors T.sub.1, T.sub.2, T.sub.7, T.sub.8 and T.sub.9. In the second state and the third state, a diode D.sub.3 which bridges the bases of the transistors T.sub.5 and T.sub.6 (points A and B) is conductive, while a diode D.sub.2, connected between ground and the point A, is conductive in the third state.

REFERENCES:
IBM Tech. Disc. Bul., "Complementary Driven for Emitter-Coupled-Logic Gates", Chang pp. 4614-4615.

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