Trench refill with selective polycrystalline materials

Details Trench refill with selective polycrystalline materials Trench refill with selective polycrystalline materials

1997-08-13

1999-11-30

Arroyo, Teresa M.

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Non-single crystal, or recrystallized, material containing...

257520, H01L 2904, H01L 2900

Patent

active

059947187

ABSTRACT:
A trench refill for a semiconductor device is undertaken by depositing polycrystalline Ge or Ge.sub.x Si.sub.1-x alloy at temperatures as low as 500.degree. C. The structure is then oxidized at for example 700.degree. C. to obtain a cap oxide on the trench refill. This method causes avoidance of (1) void formation, (2) facet formation, and (3) necessity of a second insulator deposition and planarization, meanwhile achieving all these advantages at a low thermal budget.

REFERENCES:
patent: 4473598 (1984-09-01), Ephrath et al.
patent: 4526631 (1985-07-01), Silvestri et al.
patent: 4636281 (1987-01-01), Buiguez et al.
patent: 4728624 (1988-03-01), Silvestri et al.
patent: 4847214 (1989-07-01), Robb et al.
patent: 4873205 (1989-10-01), Critchlow et al.
patent: 5008208 (1991-04-01), Liu et al.
patent: 5112772 (1992-05-01), Wilson et al.
patent: 5212110 (1993-05-01), Pfiester et al.
patent: 5213989 (1993-05-01), Fitch et al.
patent: 5254873 (1993-10-01), Poon et al.
patent: 5326718 (1994-07-01), Klose et al.
patent: 5384280 (1995-01-01), Aoki et al.
patent: 5387537 (1995-02-01), Borel
patent: 5436190 (1995-07-01), Yang et al.
K.D. Beyer et al., "Trench Isolation By Selective EPI and CVD Oxide Cap," Journal Electrochem. Soc., vol. 137, No. 12, pp. 3951-3953, Dec. 1990.
W. J. Edwards et al., "Oxidation of Polycrystalline-SiGe Alloys," Techcon Dig., p. 550, 1993.
P. Krusius, "Shallow Trench Isoltion," NSC Presentation Notes, 21 pages, 1992.
H. Mikoshiba et al, "A New Trench Isolation Technology As a Replacement of Locos," IEDM, pp. 378-581, 1984.
M.C. Ozturk et al., "Rapid Thermal Chemical Vapor Deposition of Germanium and Germanium/Silicon Alloys On Silicon: New Applications In the Fabrication of MOS Transistors," Mat. Res. Soc. Symp. Proc. vol. 224, pp. 223-234, 1991.
R.D. Rung, "Trench Isolation Prospects For Application In CMOS VLSI," IDEM Digest, pp. 574-577, 1984.
V.J. Silvestri, "Selective Epitaxial Trench (Set)," Jul. 1988, Journal Electrochem. Soc.: Solid-State Science and Technology, vol. 135, pp. 1808-1812.
Hsia et al., "Polysilicon Oxidation Self-Aligned MOS (POSA MOS)-A New Self-Aligned Double Source/Drain Ion Implantation Technique For VLSI", IEEE Electron Device Letters, vol. EDL-3, No. 2, Feb. 1982, New York, USA, pp. 40-42.
Yoshikawa et al., "A Reliable Profiled Lightly Doped Drain (PLD) Cell For High-Density Submicrometer EPROM's and Flash EEPROM's", IEEE Transactions on Electron Devices, vol. 37, No. 2, Apr. 1990, New York, USA, pp. 999-1006.

Affiliated with

Also associated with

Rating

Trench refill with selective polycrystalline materials does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Trench refill with selective polycrystalline materials, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Trench refill with selective polycrystalline materials will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1675769