Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1998-11-18
2000-07-11
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
438424, 438296, 257644, 257650, 257501, H01L 2900, H01L 2358
Patent
active
060877057
ABSTRACT:
A process is provided for forming dielectric structures having a relatively low dielectric constant arranged adjacent to the opposed lateral edges of a trench isolation structure. In an embodiment, an opening is etched vertically through a masking layer arranged upon a semiconductor substrate, thereby exposing the surface of the substrate. A patterned photoresist layer is formed upon the masking layer using optical lithography to define the region to be etched. Sidewall spacers made of a low K dielectric material are formed upon the opposed sidewall surfaces of the masking layer within the opening. The sidewall spacers are formed by CVD depositing a dielectric material within the opening and anisotropically etching the dielectric material until only a pre-defined thickness of the material remains upon the masking layer sidewall surfaces. Thereafter, a trench defined between the exposed lateral edges of the sidewall spacers is formed within the substrate. The sidewall spacers permit the lateral width of the trench to be reduced below the minimum lateral dimension definable using lithography. A trench dielectric is formed within the trench such that the upper portion of the dielectric is bound by the sidewall spacers on opposite ends. The resulting trench isolation structure is less likely to experience current leakage when operating an ensuing integrated circuit which employs the isolation structure.
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Fulford Jr. H. Jim
Gardner Mark I.
May Charles E.
Advanced Micro Devices , Inc.
Daffer Kevin L.
Fenty Jesse A.
Saadat Mahshid
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