Trench isolation structure having an implanted buffer layer

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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Details

C257SE21551, C438S433000

Reexamination Certificate

active

07443007

ABSTRACT:
The present invention provides a trench isolation structure, a method of manufacture therefor and a method for manufacturing an integrated circuit including the same. The trench isolation structure (130), in one embodiment, includes a trench located within a substrate (110), the trench having an implanted buffer layer (133) located in the sidewalls thereof. The trench isolation structure (130) further includes a barrier layer (135) located over the implanted buffer layer (133), and fill material (138) located over the barrier layer (135) and substantially filling the trench.

REFERENCES:
patent: 5880020 (1999-03-01), Mano
patent: 5915195 (1999-06-01), Fulford et al.
patent: 6274455 (2001-08-01), Seo
patent: 6576558 (2003-06-01), Lin et al.
patent: 2002/0060320 (2002-05-01), Iwamatsu et al.
patent: 2003/0049893 (2003-03-01), Currie et al.
patent: 2004/0212035 (2004-10-01), Yeo et al.

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