Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
2000-08-15
2002-04-23
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C438S422000
Reexamination Certificate
active
06376893
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an isolation structure fabricated on the silicon substrate and more particularly, to a trench isolation structure fabricated on a silicon substrate and also to a method by means of which the trench isolation structure is fabricated.
2. Background of the Related Art
Various isolation structures have been proposed to prevent the establishment of parasitic electrical connections between adjacent devices of integrated circuits fabricated on silicon substrates. Since LOCOS(Local Oxidation of Silicon) is well-characterized, simple to implement, and resistant to contamination, LOCOS processes have been widely employed to fabricate isolation structures. As device geometries reached submicron size, however, conventional LOCOS isolation reached the limit of its effectiveness, since the bird's beak structure characteristic of conventional LOCOS field oxides causes unacceptably large encroachments of the field regions of the substrate into he substrate's active regions and the surface topography of LOCOS field oxides proves inadequate to the planarity requirements of submicron scale lithography.
Advanced LOCOS processes which suppress or entirely eliminate the formation of bird's beak have been used to fabricate isolation structures for both 64-Mbit and 256-Mbit DRAM arrays. However, the field oxides of even advanced LOCOS processes prove too large for utilization in Gbit DRAM arrays, which require memory cells whose gate lengths are shorter than 0.2 &mgr;m. Trench isolation structures have been widely employed to overcome the limitations inherent in LOCOS field oxides, primarily because trenches with vertical sidewalls may be made significantly narrower than LOCOS field oxides of the same depth and widths of such trenches are more easily controlled than the widths of LOCOS field oxides. Process steps of a typical method of fabricating a conventional trench isolation structure in a silicon substrate are described immediately below with reference to the idealized cross-sectional views of
FIGS. 1A-1D
. After a thin pad oxide has been thermally grown on or deposited by chemical vapor deposition (CVD) onto a silicon substrate
10
and a silicon nitride (Si
3
N
4
) deposited onto the pad-oxide, the oxide and the nitride are patterned by means of conventional photolithographic and etching process steps to form an oxide film
11
and a nitride film
12
, respectively which together mask active (device, regions of the substrate. (The active regions are, by definition, the regions of the substrate masked by the oxide and nitride films, while the field regions are the regions of the substrate not so masked.) Trenches
13
are then selectively and anisotropically dry-etched in the field (isolation) regions of the substrate
10
, as shown in FIG.
1
A. As shown in
FIG. 1B
, a conformal oxide film
14
is deposited onto the nitride film and onto the walls and floor of the trenches
13
. The areas of the oxide film
14
which line the trenches
13
serve to repair damage suffered by the substrate when the trenches were etched. As shown in
FIG. 1C
, a layer of amorphous SiO
2
(known also as fused silica, undoped silica glass, or silica glass)
16
is deposited by CVD onto the conformal oxide film
14
and within each of the trenches
13
. Various other dielectrics, including CVD-polysilicons, may be used to refill the trenches. As shown in
FIG. 1D
, the silica glass layer
16
is etched-back until silica glass remains only within the lined trenches, thus completing fabrication or trench isolation structures
19
, each of which the lined trenches, thus completing fabrication of trench isolation structures
19
, each of which consists of an oxide trench liner
14
a
within each of the trenches
13
and a silica glass structure
16
a
within each of the trench liners
14
a.
Although trench isolation structures, particularly those formed in deep, narrow trenches, overcome many of the limitations of LOCOS field oxides, methods of fabricating trench isolation on structures, as typified by the method described above, are not without drawbacks. For any trench width, trenches are more likely to be imperfectly formed and incompletely filled as the aspect ratio(i.e., the ratio of depth to width) of the trenches increases. For example, trench sidewall profiles must be strictly controlled to avoid void formation when the trenches are refilled with silica glass or other solid dielectric. Moreover, for any aspect ratio, formation of voids becomes more likely as the trenches become narrower than about 2 &mgr;m.
SUMMARY OF THE INVENTION
An object of the invention is to provide a trench isolation structure in which a gas, rather than a solid, is used as the dielectric within the trench, thus completely avoiding the problem of void formation inherent in refilling trenches with solid dielectrics. The trench isolation structure of the present invention includes a first conformal insulation film (preferably consisting of silicon nitride) which lines a trench etched in a silicon substrate, an insulation layer (preferably consisting of silicon dioxide) within the cavity.
The method of fabricating the trench isolation structure of the present invention begins with depositing a first conformal insulation film (preferably a silicon nitride film) onto surfaces of a trench etched in a silicon substrate, thereby forming a lined trench, followed by sputtering amorphous carbon into the lined trench. The lined trench is then capped by an insulating layer which, in conjunction with regions of the surfaces of the trench, encloses the amorphous carbon within a cavity. The amorphous carbon within the cavity is converted to carbon dioxide gas by furnace annealing the substrate in an oxidizing ambient. Planarizing the insulating layer to the substrate completes the isolation structure.
REFERENCES:
patent: 4169000 (1979-09-01), Raiseman
patent: 4356211 (1982-10-01), Raiseman
patent: 5098856 (1992-03-01), Beyer et al.
patent: 5668398 (1997-09-01), Havemann et al.
patent: 6057226 (2000-05-01), Wong
patent: 6114186 (2000-09-01), Jeng et al.
Yamamoto et al., Ultrathin Amorphous C:H Overcoat by pCVD on Thin Film Media., 2000 IEEE, pp. 115-119.
Chaudhuri Olik
Duy Mai Anh
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
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