Trench isolation structure and a method of manufacture therefor

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S624000, C438S612000, C438S424000

Reexamination Certificate

active

07371658

ABSTRACT:
The present invention provides a trench isolation structure, a method of manufacture therefor and a method for manufacturing an integrated circuit including the same. The trench isolation structure (130), in one embodiment, includes a trench located within a substrate (110), the trench having a buffer layer (133) located on sidewalls thereof. The trench isolation structure (130) further includes a barrier layer (135) located over the buffer layer (133), and fill material (138) located over the barrier layer (135) and substantially filling the trench.

REFERENCES:
patent: 5950090 (1999-09-01), Chen et al.
patent: 6518155 (2003-02-01), Chau et al.
patent: 6656793 (2003-12-01), Jeong et al.
patent: 6847093 (2005-01-01), Ichinose et al.
patent: 2004/0070023 (2004-04-01), Kim et al.
patent: 2004/0164373 (2004-08-01), Koester et al.
patent: 2005/0095807 (2005-05-01), Xiang

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