Trench isolation method for semiconductor devices

Details Trench isolation method for semiconductor devices Trench isolation method for semiconductor devices

1987-11-17

1988-12-13

Chaudhuri, O.

Fishing, trapping, and vermin destroying

156646, 156657, H01L 21471, H01L 21475

Patent

active

047910739

ABSTRACT:
A method is described for forming dielectric filled isolation trenches in semiconductor substrates in which a differentially etchable etch-stop layer is provided above the surface of the substrate during the trench filling process so that the height of the trench filling relative to the surface of the substrate may be adjusted for optimum overall results during subsequent fabrication steps and so that the substrate surface may be protected from contact with the etching reagents used during planarization of the trench filling material. This avoids damage to the substrate surface and permits improved surface planarity.

REFERENCES:
patent: 4484979 (1984-11-01), Stocker
patent: 4626317 (1986-12-01), Bonn
patent: 4631219 (1986-12-01), Geipel, Jr. et al.

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