Trench isolation for semiconductor devices

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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Details

C438S296000, C438S435000, C438S437000, C438S761000

Reexamination Certificate

active

06214697

ABSTRACT:

BACKGROUND
Trenches formed in the substrate and filled with oxide are widely used as isolation structures. Shallow trench structures can be used to isolate adjacent electronic devices, such as transistors. Deep trench isolation structures can be used to isolate N-wells and P-wells in the substrate. The trench isolation technology has proved to be important in fabricating large scale integrated circuits that require high density of electronic devices.
Trench isolation structures may be formed in a semiconductor substrate by depositing silicon dioxide in the isolation trench. A silicon dioxide layer is thermally grown over the surface of a silicon substrate. Next, a silicon nitride layer is deposited by chemical vapor deposition. The layers are then patterned to define the width of a trench to be etched in the silicon substrate. The exposed surface, in this case silicon nitride, is then removed using plasma or chemical etching. Similarly, silicon dioxide is removed by chemical or plasma etching. Following this, the exposed surface of the substrate, in this case silicon, is further removed to create a trench.
After a desired trench depth is obtained, the etch process stops. A thin silicon oxide layer is thermally grown in the trench area. This trench oxide layer is formed to passivate the interior walls and bottom of the trench which may have been slightly damaged during the trench etch.
Upon completion of the trench oxide layer, deposited silicon dioxide is used to fill the trench. After the deposition of silicon dioxide, the substrate is planarized. During planarization, silicon dioxide is removed completely over the silicon nitride hard mask. The silicon nitride layer is subsequently etched away. In this structure, deposited silicon dioxide covers the trench area, whereas thermally grown silicon dioxide, called pad oxide, covers the non-trench area.
In a subsequent step of etching away the pad oxide layer, grooves and notches indicated as “A” may be created in the trench oxide surface area
60
a
, which is illustrated in FIG.
2
.
A sacrificial oxide layer may be thermally grown onto a substrate after trench formation. After implantation, the sacrificial oxide layer typically is removed by chemical etching.
Because thermally grown silicon dioxide can only form in the area where there is silicon, this grown silicon dioxide layer covers only the non-trench area. As a result, the trench area is not covered by additional silicon dioxide. When the sacrificial oxide layer
80
a
is subsequently etched away, some of the trench fill oxide
60
a
will be etched away, as indicated at “A” in FIG.
3
.
The formation of grooves and notches of this sort may adversely impact the operability and reliability of an integrated circuit.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of fabricating a semiconductor device includes depositing a first material on a surface, the material having a first etch rate. A trench is formed through the first material and into the surface. A trench filler material is deposited in the trench. The deposited trench filler material has an etch rate that is substantially similar to or less than the first etch rate.
In accordance with another aspect of the present invention, a method of providing a sacrificial layer on a semiconductor structure having a trench structure filled with a trench filler material includes depositing a first material over the trench filler material and the surface. The layer is annealed.
In accordance with yet another aspect of the present invention, a semiconductor structure includes a support and a first material deposited on the support. A trench is formed through the first material and into the support. A trench filler material deposited in the trench. The deposited trench filler material has an etch rate that is substantially similar to or less than the etch rate of the first material.
In accordance with still another aspect of the present invention, a semiconductor structure having a trench includes a trench filler material that fills the trench. At least a portion of a second material is deposited on the trench filler material. The second material is annealed.
In accordance with but another aspect of the present invention, a method of forming trench isolation structures in semiconductor devices includes forming a layer on a semiconductor member and forming a trench through the layer and into the member. The trench is filled with a trench filling material. The trench filling material is etched and the layer is removed without forming grooves in the remaining trench filling material.


REFERENCES:
patent: 5190889 (1993-03-01), Poon et al.
patent: 5229316 (1993-07-01), Lee et al.
patent: 5354387 (1994-10-01), Lee et al.
patent: 5472904 (1995-12-01), Figura et al.
patent: 5677233 (1997-10-01), Abiko
patent: 5728621 (1998-03-01), Zheng et al.
patent: 5731241 (1998-03-01), Jang et al.
patent: 5786262 (1998-07-01), Jang et al.

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