Trench isolation for semiconductor devices

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

H01L 2176

Patent

active

060514809

ABSTRACT:
In etching trench isolation structures, a pad oxide or sacrificial oxide may be formed with substantially the same (or higher) etch rate as the trench filler. Because the etch rate in the trench area is substantially similar to (or less than) the etch rate in the non-trench area, similar amounts of material are removed in both the trench area and non-trench area in a subsequent etching process. Consequently, formation of notches and grooves in the semiconductor structure is minimized. A sacrificial oxide layer may be made by depositing a layer of a suitable material on the surface of a semiconductor structure. By depositing a sacrificial oxide layer instead of thermally growing a sacrificial oxide layer, grooves and the notches in the trench areas are filled by the deposited material.

REFERENCES:
patent: 5472904 (1995-12-01), Figura et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Trench isolation for semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Trench isolation for semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Trench isolation for semiconductor devices will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2335906

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.