Trench interconnect structure and formation method

Details Trench interconnect structure and formation method Trench interconnect structure and formation method

2006-11-21

2006-11-21

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S734000, C257S773000

Reexamination Certificate

active

07138719

ABSTRACT:
Embodiments concern vertical interconnect structures having sub-micron widths for use in integrated circuits, and methods of their manufacture, which result in reduced interconnect resistance, I2R losses, and defects or variations due to cusping. Embodiments of the methods involve forming an opening in an insulating layer, where the opening forms a trench that exposes an underlying portion of a metal layer. Additional embodiments involve depositing multiple layers of conductive material within the opening and above the insulating layer, where one of the conductive layers includes aluminum and is deposited using a “cold aluminum” process, and a second one of the conductive layers also includes aluminum, but is deposited using a “hot aluminum” process. The interconnect structures are adapted for use in conjunction with memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

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