1988-08-24
1990-08-21
Hille, Rolf
357 231, 357 43, 357 49, 357 55, H01L 2978
Patent
active
049511025
ABSTRACT:
VMOS transistors are formed with gate segments in dielectric trenches separating islands formed on a common dielectric base. A trench gate may be common for VMOS at opposed edges of adjacent islands, for VMOS at common edge of common islands or for VMOSs at uncommon edges of common islands. Common regions of an island may be used to form parallel or series VMOS with separate trench gates. The trenches may be formed after device region formation. Isolated gate segments may be formed by removing portions of dielectrically filled trenches to form recesses to be filled with gate material or forming gate material filled dielectric trenches and removing portions of the gate material and refilling with dielectric to form the isolated gate segments.
REFERENCES:
patent: 3893155 (1975-07-01), Ogiue
patent: 4296429 (1981-10-01), Schroeder
patent: 4408304 (1983-10-01), Nishizawa et al.
patent: 4751561 (1988-06-01), Jastrzebski
"A Trench MOSFET with Surface Source/Drain Contacts", IEDM-85, CH2252-5/85/0000-0200, 1985 IEEE.
"Trench Transistor Cell with Self-Aligned Contact (TSAC) for Megabit MOS Dram", IEDM '86, CH2381-2/86/0000-0132, 1986, IEEE.
"Characterisation of the Lateral and Vertical Parasitic . . . ", Elecrochemical Society Meeting, Abstract No. 274, pp. 411-412.
Beitman Bruce A.
Boucher Charles F.
Harris Corporation
Hille Rolf
Tran Minh Loan
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