Trench dual-gate MOSFET

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357 233, 357 55, H01L 2910, H01L 2906

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active

049757547

ABSTRACT:
A trench dual-gate MOSFET comprises a projection which is bent to enclose a predetermined region on a semiconductor substrate of a first conductivity type. This projection is defined by a trench formed by selectively removing the surface region of the semiconductor substrate. A gate insulation film is formed on the side wall of the projection and on the semiconductor substrate portion located around the base of the projection. A gate electrode is formed on the side wall of the projection and on the semiconductor substrate portion located around the base of the projection, with the gate insulation film interposed and in a manner to surround the projection. A first impurity region of a second conductivity type, which serves as either a source or drain region, is formed in the top portion of the projection. A second impurity region of the second conductivity, which serves as either a drain or source region, is formed in the surface region of that portion of the semiconductor substrate which is located around the base of the projection.

REFERENCES:
patent: 4729966 (1988-03-01), Koshino et al.
Mizuno et al., "High Speed and Highly Reliable Trench MOSFET With Dual Gate", Symp. VLSI, pp. 23-24, 1988.
V. L. Rideout., "Method for Fabricating an Enclosed DMOS Device", IBM Technical Disclosure Bulletin, vol. 21, No. 5, pp. 2105-2106, 1978.
Richardson et al., "A Trench Transistor Cross-Point DRAM Cell," IEDM Technical Digest, pp. 714-719, 1985.

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