Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-12-16
2000-11-21
Smith, Matthew
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438435, 438437, 438296, H01L 2176
Patent
active
061502340
ABSTRACT:
An isolation structure on an integrated circuit is formed using a shallow trench isolation process. On a substrate, a trench is formed. A thermal anneal is performed to oxidize exposed areas of the substrate to provide for round corners at a perimeter of the trench. The thermal anneal in performed in an ambient where a chlorine source is added to O.sub.2 in order to minimize facets while creating the round corners. Oxidation time is lengthened by introducing an inert gas during the thermal anneal.
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Smith Matthew
VLSI Technology Inc.
Weller Douglas L.
Yevsikov Victor
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