Fishing – trapping – and vermin destroying
Patent
1989-07-25
1992-05-05
Wojciechowicz, Edward J.
Fishing, trapping, and vermin destroying
357 2311, 357 68, 437 48, 437 66, 437186, 437203, 437228, 437919, 437924, H01L 2968, H01L 2144
Patent
active
051112590
ABSTRACT:
The described embodiments of the present invention provide DRAM cells, structures and manufacturing methods. In a first embodiment, a DRAM cell with a trench capacitor having a first plate formed as a diffusion on the outside surface of a trench formed in the substrate and a second plate having a conductive region formed inside the trench is fabricated. In another embodiment of the present invention, a planar capacitor is used with a field plate isolation scheme including a transfer transistor moat region self-aligned to the field plate. This structure allows the elimination of alignment tolerances between the capacitor and the transistor thus reducing the space necessary between the transistor and the capacitor.
In another embodiment of the present invention, a memory cell using two conductive plates formed inside a trench as the storage capacitor is fabricated. A field plate isolation scheme which allows for self-alignment of the moat containing the transfer transistor is used thus allowing for self-alignment of the moat and elimination of alignment tolerances between the moat region and the source drain diffusions. In addition, a sidewall insulator technique using two different materials, which may be selectively etched between one another, is used.
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patent: 5006910 (1991-04-01), Taguchi
Nakajima, et al., IEDM 1984, pp. 240-243.
Teng Clarence
Ying Peter
Donaldson Richard L.
Griebenow L. Joy
Hiller William E.
Texas Instruments Incorporated
Wojciechowicz Edward J.
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