Fishing – trapping – and vermin destroying
Patent
1990-09-05
1993-09-14
Fourson, George
Fishing, trapping, and vermin destroying
437 47, 437 90, 257302, H01L 2174
Patent
active
052448240
ABSTRACT:
A trench capacitor and transistor structure is formed in a semiconductor device. In one form, a transistor is fabricated within a cylindrical trench capacitor. The capacitor is formed within two displaced parallel planes in a substrate material, and has two electrodes which are separated by a dielectric material. The electrodes and dielectric are formed on a wall and a floor of the cylindrical trench. A column of epitaxial material is grown from the floor of the trench. A source region is formed by doping the top portion of the epitaxial column, and a drain region is formed by doping the floor of the trench. A gate electrode is deposited into the trench, creating a channel region along the sides of the epitaxial column. Thus, a transistor is also formed within the two displaced parallel planes in the substrate material.
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IBM Technical Disclosure Bulletin vol. 30, No. 8, Jan. 1988, "Process to Make . . . Memory Cells".
High Performance CMOS Surrounding Gate Transistor (SGT) for Ultra High Density ISIs, by H. Takato, et al, International Electron Devices Meeting, 1988, pp. 22-25.
A Surrounding Gate Transistor (SGT) Cell for 64/266Mbit DRAMs; by K. Sunouchi et al International Electron Devices Meeting, 1989, pp. 22-26.
Selective Epitaxial Trench (SET), by V. J. Silvestri, Journal of Electrochemical Society, Solid State Science and Technology, Jul. 1988, vol. 135, No. 7, pp. 1808-1812.
Fourson George
Goddard Patricia S.
Motorola Inc.
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