Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2007-12-25
2007-12-25
Sarkar, Asok K. (Department: 2891)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S745000, C257SE21219
Reexamination Certificate
active
11256348
ABSTRACT:
A method is described for treating a wafer having at least a surface layer of semiconductor material, with the surface of this surface layer having undergone a chemical-mechanical polishing step followed by an RCA cleaning step. After the polishing step and prior to the RCA cleaning step, the method includes an intermediate step of cleaning the surface of the surface layer of semiconductor material using an SC1 solution under concentration and temperature conditions that allow the emergence of defects in the surface layer (curve B) to be reduced compared with a similar surface layer which has not undergone such an intermediate cleaning step (curve A).
REFERENCES:
patent: 5374564 (1994-12-01), Bruel
patent: 5919311 (1999-07-01), Shive et al.
patent: 6312797 (2001-11-01), Yokokawa et al.
patent: 2003/0153162 (2003-08-01), Nakano et al.
patent: 2004/0115905 (2004-06-01), Barge et al.
patent: 2005/0020084 (2005-01-01), Richtarch
patent: 2005/0218111 (2005-10-01), Maleville et al.
patent: 2006/0054181 (2006-03-01), Rayandayan et al.
patent: 2006/0138538 (2006-06-01), Ohmi et al.
patent: 2006/0264343 (2006-11-01), Verhaverbeke et al.
patent: 2006/0270242 (2006-11-01), Verhaverbeke et al.
patent: 2006/0272677 (2006-12-01), Lee et al.
patent: 0 971 396 (2000-01-01), None
patent: 1 302 985 (2003-04-01), None
patent: WO 01/15215 (2001-03-01), None
patent: WO 02/15244 (2002-02-01), None
A.J. Auberton-Heré et al, “Why Can Smart-Cut Change the Future of Microelectronics?”, Int Journal of High Speed Electronics and Systems, vol. 10, No. 1, pp. 131-146.(2000).
Coletti Stéphane
Duquennoy-Pont Véronique
S.O.I.Tec Silicon on Insulator Technologies
Sarkar Asok K.
Winston & Strawn LLP
Yevsikov Victor V.
LandOfFree
Treatment of semiconductor wafers does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Treatment of semiconductor wafers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Treatment of semiconductor wafers will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3878336