Receptacles – Compartmented container – Cells
Reexamination Certificate
1999-01-28
2001-03-20
Castellano, Stephen (Department: 3727)
Receptacles
Compartmented container
Cells
C206S706000, C206S725000
Reexamination Certificate
active
06202883
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a tray for a plurality of semiconductor integrated circuit devices, the tray being used for baking the semiconductor integrated circuit devices in a state where the semiconductor integrated circuit devices are seated or received thereon, and a method of baking semiconductor integrated circuit devices using the above tray.
2. Description of Related Art
A tray, made of a resin, for semiconductor integrated circuit devices (to be sometimes referred to as “IC tray” hereinafter) is used in the step of drying semiconductor integrated circuit devices under heat, during the tests of testing produced semiconductor integrated circuit devices including the step of inspection thereof, or during the transportation thereof. In the step of producing a resin-sealed or resinen-capsulated semiconductor integrated circuit device (to be sometimes referred to as “IC” hereinafter), generally, soldering is carried out at a high temperature. When a sealing resin for sealing an IC (an epoxy resin is generally used) contains water, the problem is that the water in the sealing resin sharply evaporates due to heat during the soldering step so that the sealing resin undergoes cracking. To overcome the above problem, the process of IC production includes a baking treatment step for removing water contained in the sealing resin.
In the baking treatment, generally, ICs are dried at a temperature between 120° C. and 140° C. for at least 24 hours by placing tens of IC trays having a plurality of ICs thereon in a hot air oven in a state in which the IC trays are stacked one on another.
However, the above baking treatment involves the following problem. During the above drying process, particularly, immediately after the heating is initiated, the IC trays are twisted to be deformed, and the stacked IC trays may be overturned, or the ICs may fall out of the IC trays. These cause damage to the ICs, and the ICs work improperly. It is said that one of causes of twisting of the IC trays in the baking treatment is as follows. That is, the ICs are dried under heat in a state where the IC trays are stacked in a multiple form, heat is not uniformly or immediately conducted to the central portions of the IC trays in view of both the form and the material of the IC trays, and the temperature distribution varies widely between the circumferential portion and the central portion of the IC tray. As a result, a local stress or an uneven stress occurs in the IC tray.
Techniques for improving the drying efficiency of the baking treatment under heat using the IC trays are disclosed, e.g., in JP-A-2-232944 and JP-A-3-43383. JP-A-2-232944 discloses an IC tray which has opening portions in an arbitrary form formed in its ICs-seating portions. The opening portions are located below lead portions of surface mount type ICs. It is said that the above opening portions improve the flow of air in the upward and downward directions so that the time period of the baking treatment can be decreased. JP-A-3-43383 discloses an IC tray which has cut portions provided in partition walls formed in an ICs-seating portions and cut portions provided in circumferential frame portions of the IC tray. The provided cut portions improve air flow in the IC tray in the horizontal direction.
Since, however, the IC trays disclosed in the above Japanese Laid-open Patent Publications have the opening portions and the cut portions in their ICs-seating portions, the opening portions and the cut portions are almost closed when ICs are seated in the ICs-seating portions. Further, the opening portions provided in the ICs-seating portions, or the cut portions provided in the partition walls formed in the ICs-seating portions and provided in the circumferential frame portions of the IC tray, have a small area, and thus these opening portions or the cut portions have little effect on attaining a uniform temperature distribution in the IC tray itself. Further, the IC trays disclosed in the above Japanese Laid-open Patent Publications are intended for efficiently evaporating water from a sealing resin of ICs, and the trays are not intended for preventing the twist-induced deformation of the IC trays themselves. Further, in the baking treatment, the twist-induced deformation of the IC tray is caused not only by the non-uniformity of the temperature distribution in the IC tray but also is caused greatly by the form and the structure of the IC tray as well. The above Japanese Laid-open Patent Publications do not at all refer to these points.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a tray for semiconductor integrated circuit devices which is almost free from twisting and deformation in the step of drying a sealing resin of the semiconductor integrated circuit device under heat (during a baking treatment), and a method of baking semiconductor integrated circuits using the above tray.
A tray for semiconductor integrated circuit devices, according to a first aspect of the present invention for achieving the above object, comprises
a plurality of first partition walls extending in a first direction, a plurality of second partition walls extending in a second direction at right angles with the first direction, and circumferential frame portions connecting end portions of the first and second partition walls,
wherein regions surrounded by the first partition walls and the second partition walls constitute seating portions for seating semiconductor integrated circuit devices,
the first partition walls are disposed such that one first partition wall is disposed between two rows of the seating portions which are adjacent to each other in the second direction, the second partition walls are disposed such that two second partition walls are disposed between two rows of the seating portions which are adjacent to each other in the first direction, and opening portions are formed between said two second partition walls.
A method of baking semiconductor integrated circuit devices, according to a first aspect of the present invention for achieving the above object, using the tray for semiconductor integrated circuit devices according to the above first aspect of the present invention, comprises stacking the trays having resin-sealed semiconductor integrated circuit devices seated in the seating portions in an oven, and drying a sealing resin of the semiconductor integrated circuit device under heat.
A tray for semiconductor integrated circuit devices, according to a second aspect of the present invention for achieving the above object, comprises
a plurality of first partition walls extending in a first direction, a plurality of second partition walls extending in a second direction at right angles with the first direction, and circumferential frame portions connecting end portions of the first and second partition walls,
wherein regions surrounded by the first partition walls and the second partition walls constitute seating portions for seating semiconductor integrated circuit devices,
the first partition walls are disposed such that two first partition walls are disposed between two rows of the seating portions which are adjacent to each other in the second direction, opening portions are formed between said two first partition walls, the second partition walls are disposed such that two second partition walls are disposed between two rows of the seating portions which are adjacent to each other in the first direction, and opening portions are formed between said two second partition walls.
A method of baking semiconductor integrated circuit devices, according to a second aspect of the present invention for achieving the above object, using the tray for semiconductor integrated circuit devices according to the above second aspect of the present invention, comprises stacking the trays having resin-sealed semiconductor integrated circuit devices seated in the seating portions in an oven, and drying a sealing resin of the semiconductor integrated circuit devic
Kakinoki Osamu
Narazaki Norio
Shiraishi Yutaka
Castellano Stephen
Mitsubishi Engineering-Plastics Corp.
Wenderoth , Lind & Ponack, L.L.P.
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