Boots – shoes – and leggings
Patent
1994-01-28
1996-01-02
Mai, Tan V.
Boots, shoes, and leggings
G06F 15332
Patent
active
054814871
ABSTRACT:
A transpose memory is disclosed which has four dual port memories, a first counter for writing elements in the dual port memories and a second counter for reading out elements from the dual port memories. If the received matrix is to be outputted to the first type of transform circuit, the first counter writes each matrix element in a particular dual port memory assigned to the quadrant of the matrix element. If the received matrix is to be outputted to the second type of transform circuit, the first counter writes each matrix element in a particular dual port memory assigned to the "evenness" or "oddness" (i.e., divisibleness by two) of the row and column of the matrix element.
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Huang Po-Chuan
Jang Yi-Feng
Kao Jinn-Nan
Industrial Technology Research Institute
Mai Tan V.
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